When an ARMv7-A MPCore system is in SMP mode, which of the following TWO operations...

Vendor: ARM
Product: EN0-001
Update on: Jul 25, 2025
Questions: 210

ARM EN0-001 Question Answer

When an ARMv7-A MPCore system is in SMP mode, which of the following TWO operations can the processor handle automatically? (Choose two)

Coherency management between all L1 data caches

Broadcast of some inner-shared cache and TLB maintenance operations

Broadcast of some outer-shared cache and TLB maintenance operations

Coherency management between all L1 instruction caches

Coherency management between all external caches

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